Field of the Invention
The present invention relates to a solid-state imaging device typified by a CMOS image sensor, a drive method thereof and a camera system.
Description of the Related Art
In recent years, the CMOS image sensor receives attention as a solid-state imaging device (image sensor) as an alternative to a CCD image sensor. There are the following reasons for this.
Dedicated processes are necessary for manufacturing CCD pixels, plural power supply voltages are necessary for the operation and further, it is necessary to coordinate plural peripheral ICs to operate the CCD.
In response to the above, the CMOS image sensor overcomes various problems such that the system becomes extremely complicated in the CCD image sensor.
The CMOS image sensor can use the same manufacturing processes as a common CMOS integrated circuit in manufacture thereof, which can be driven by a single power supply and which can mix an analog circuit and a logic circuit using the CMOS process in the same chip.
Accordingly, the CMOS image sensor has plural important advantages such that the number of the peripheral ICs can be reduced.
As an output circuit of the CCD, a one-channel (ch) output type using a FD amplifier having a floating diffusion (FD) layer is the mainstream.
On the other hand, the CMOS image sensor has FD amplifiers with respect to respective pixels and a column-parallel output type in which a given row in a pixel array is selected and pixels are simultaneously read in a column direction is the mainstream.
This is because it is difficult to obtain sufficient drive capability by the FD amplifiers arranged in the pixels and it is necessary to reduce the data rate so that parallel processing is effective.
In this type of solid-state imaging device, a vertical signal line (pixel signal reading line) transferring signals from pixels which forms a source follower with an amplifier output unit including an amplifier transistor of the pixel is connected to a load element (load MOS) forming a constant current source at the outside of a pixel unit.
It is important to reduce settling time of the vertical signal line transferring signals from pixels in the CMOS image sensor, and various techniques concerning this including the load element (load MOS) have been proposed.
In JP-A-2008-211540 (Patent Document 1), a technique of allowing current to be statically variable in accordance with operation speed is proposed.
In JP-A-2009-22269 (Patent Document 2), a technique of increasing load MOS current temporarily when a control signal of a switching transistor driving the vertical signal line is activated.
Additionally, a “mechanism of automatically increasing current only when necessary” has been studied since about 1990 in a theme of “active pull-down” (refer to Ching-Te Chugang, “Advanced Bipolar Circuits,” Circuits & Devices, pp. 32-36, November 1992 (Non-patent document 1), Jouppi, “A speed, power, and supply noise evaluation of ECL driver circuits,” IEEE J. of SC, pp. 38-45, January 1996 (Non-patent Document 2), T. Kuroda, et. al., “Capacitor-free level-sensitive active pull-down ECL circuit with self-adjusting driving capability,” IEEE J. of SC, pp. 819-827, June 1996 (Non-patent Document 3), and K. Ueda, et. al., “A fully compensated active pull-down ECL circuit with self-adjusting driving capability,” IEEE J. of SC, pp. 46-53, June 1996 (Non-patent Document 4).
These studies chiefly aim at speeding up transfer of binary signals dealt by a logic circuit called ECL (Emitter Coupled Logic) while suppressing the increase of power consumption.